This invention relates generally to semiconductor fabrication techniques and more particularly to semiconductor fabrication involving resist patterning techniques.
As is known in the art, fabrication of a semiconductor circuit, such as an integrated circuit, may include patterning of one or more resist layers to form patterns to permit the formation of patterned metal layers over a semiconductor substrate. Two types of metal patterning techniques are generally employed.
In one technique, a metal layer is deposited on the substrate and a resist layer is then deposited over the metal layer. The resist is patterned using conventional techniques to expose selected underlying portions of the metal layer. The exposed portions of the metal layer are then etched away and the resist is removed leaving behind a patterned metal layer.
In a second technique, a resist layer is deposited over the substrate. Apertures are formed in the resist layer to expose underlying portions of the substrate. A layer of metal is then deposited over the resist layer and through the apertures onto the exposed portions of the substrate. If the metal layers deposited through the apertures are discontinuous from the metal deposited over the resist layer, the resist layer can be simply dissolved away, carrying away the metal layer deposited on the resist while leaving behind the patterned metal layer on the substrate. This latter technique is generally referred to as "lift-off." In order to provide a patterned metal layer using the so-called lift-off technique, it is desirable that the metal layers deposited on the substrate be discontinuous from the metal layer deposited over the resist layer.
Although the technique appears to be relatively straight forward, a problem arises in achieving a suitable resist profile which enables easy and reproducible lift-off of the photoresist and, hence, the metal disposed over the photoresist without damaging the metal disposed on the substrate.
Many approaches have been proposed for providing a suitable resist profile to aid in the lift-off of the metal from the substrate. These techniques which include resist conditioning techniques, as well as double layer resist patterning techniques are used to provide patterned resist features having a profile suitable for insuring that the metal deposited over the resist is discontinuous from the metal deposited on the substrate. The double resist techniques, for example, although useful, are also time consuming and thus costly particularly for large scale production of semiconductor circuits.
Accordingly, it would be desirable to provide a technique more suitable for a production environment which also provides more consistent results to make lift-off a relatively fast, easy, and reproducible processing step.